This patent relates to capacitive transducers, and more particularly to techniques for attenuation of unwanted disturbances in capacitive transducers.
Transducers convert a general physical quantity (for example, acceleration, pressure, etc.) to quantities that can be processed by electronic circuits. In particular, capacitive transducers produce a change of capacitance, corresponding to the magnitude of the measured input signal. Readout circuits for capacitive transducers transform the capacitance change produced by the transducer to an electrical signal. In the process, the circuits apply voltage waveforms to the transducer electrodes.
A capacitive accelerometer, a capacitive transducer for measuring acceleration, includes a mechanical sensing element and a readout circuit. FIG. 1 illustrates an exemplary embodiment of a mechanical sensing element 100 of a capacitive accelerometer. In this embodiment, the mechanical sensing element 100 includes a mass 102 suspended between a first spring 104 and a second spring 106, a first electrode 110 and a second electrode 112. A proximal end of the mass 102 is coupled to the first spring 104 and a distal end of the mass 102 is coupled to the second spring 106. The first spring 104 has two ends; a first end coupled to the proximal end of the mass 102 and a second end coupled to a substrate. The second spring 106 has two ends; a first end coupled to the distal end of the mass 102 and a second end coupled to the substrate. A common electrode 108 is coupled to the mass 102 and moves with the mass 102 relative to the substrate. The first and second electrodes 110, 112 are stationary relative to the substrate. In this embodiment a positive reference voltage VS is applied to the first electrode 110 and the negative reference voltage −VS is applied to the second electrode 112. A first variable capacitor C1 is formed between the first electrode 110 and the common electrode 108, and a second variable capacitor C2 is formed between the second electrode 112 and the common electrode 108.
In this embodiment, when the system is at rest, there is a substantially equal nominal gap g0 between the first electrode 110 and the common electrode 108 and between the second electrode 112 and the common electrode 108, creating substantially equal capacitances in the first variable capacitor C1 and the second variable capacitor C2. An input acceleration moves the mass 102 relative to the substrate which varies the gaps between the electrodes and varies the capacitance of the variable capacitors C1, C2. Acceleration in the direction of arrow 120 deflects the mass 102 a distance Δx that is proportional to the input acceleration. This movement of the mass 102 increases the distance between the first electrode 110 and the common electrode 108 to g0+Δx, and decreases the distance between the second electrode 112 and the common electrode 108 to g0−Δx, which changes the capacitance of capacitors C1 and C2. The capacitance C of variable capacitors C1 and C2 can be determined by:
                              C                      1            /            2                          =                                            ɛ              0                        ⁢            A                                              g              0                        ±                          Δ              ⁢                                                          ⁢              x                                                          (        1        )            where ∈0 is dielectric permittivity, A is the area of the capacitive plates (which extend into the paper), g0 is the nominal gap and Δx is the displacement due to the acceleration. The readout circuit determines the value of Δx based on the capacitance change in capacitors C1 and C2.
FIG. 2 is a schematic of an exemplary embodiment of a self-balancing capacitive bridge 200. The switched-capacitor implementation shown in FIG. 2 has the advantage of straightforward DC biasing of the input without the need for a high resistance path, as well as a stable and well-defined transfer function over process and temperature. It also provides a discrete-time output signal, which can be digitized directly by an analog-to-digital converter (ADC). FIG. 2 shows a single-ended embodiment of a self-balancing bridge.
The self-balancing bridge 200 includes a sensor core 210 with two variable capacitors, C1 and C2, and a readout or interface circuit 220. The sensor core 210 represents a capacitive sensor element, for example the sensing element 100 shown in FIG. 1 or one of various other capacitive sensor elements known in the art.
The readout circuit 220 includes a forward path that passes the output of the sensor core 210 through an integrator 222, which provides gain, to the output V0. In this embodiment, the integrator 222 includes an amplifier 224 with an integrating capacitor Ci. The inverting input of the amplifier 224 is coupled to the common node M between the variable capacitors C1 and C2, the non-inverting input of the amplifier 224 is coupled to ground, and the output of the amplifier 224 provides the output voltage Vo. The integrating capacitor Ci couples the inverting input of the amplifier 224 to the output of the amplifier 224.
The self-balancing bridge 200 also includes a first feedback path 230 and a second feedback path 240 that feedback the output voltage Vo to the sensor core 210. The first feedback path 230 feeds back the output voltage Vo through a first inverting amplifier 232 to a first summing node 234. The first summing node 234 sums the inverted output voltage −V0 and inverted reference voltage −VS, and outputs the resulting voltage −VS−V0 to the first variable sensor capacitor C1. The second feedback path 240 feeds back the output voltage Vo through a second inverting amplifier 242 to a second summing node 244. The second summing node 244 sums the inverted output voltage −V0 and reference voltage VS, and outputs the resulting voltage VS−V0 to the second variable sensor capacitor C2.
The self-balancing bridge 200 tries to equalize the absolute charge on the two sensor capacitors, C1 and C2. Under these conditions the output voltage is proportional to the ratio between the difference and the sum of the measured capacitors:
                              V          o                =                              -                          V              S                                ⁢                                                    C                1                            -                              C                2                                                                    C                1                            +                              C                2                                                                        (        2        )            Measuring the above ratio is of interest for a variety of applications, acceleration sensors being only one particular example.
In addition to producing the result in Eq. (2), equalizing the absolute charge on the transducer capacitors has the advantage of creating equal electrostatic forces, acting on the moving plates of the variable capacitors, C1 and C2, in opposite directions. The net force on the transducer is reduced; hence the interface circuit does not disturb the measurement by inducing spurious deflection of the capacitor plates. In order for this condition to be fulfilled, however, the absolute charge on the transducer capacitors must be maintained equal at any given point of time. Implementing the summing nodes to simply equalize the time-average charge on the transducer capacitors does not maintain equal charge at all times during operation. Applying the same absolute voltage to the sensor capacitors results in different absolute charges, and therefore different electrostatic forces when C1 and C2 are different. The charge balance is achieved only on average, which does not result in zero net force. Using active summing circuits for the summing amplifiers 234, 244 helps maintain the correct voltage for equalizing the charge on C1 and C2.
However, it is well known that amplifiers introduce disturbances, such as noise and offset, to the signals they process. While switched-capacitor techniques such as Correlated Double-Sampling (CDS) can eliminate low-frequency noise and offset, the broad-band noise, which is aliased near DC by the sampling process, cannot be rejected. Furthermore, CDS roughly doubles the amount of broad-band noise, which appears near DC. It would be desirable to attenuate these unwanted disturbances so that they have reduced impact on the output measurement of the circuit.